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ECC ==>
error detection and correction
<algorithm, storage> (EDAC, or "error checking and
correction", ECC) A collection of methods to detect errors in
transmitted or stored data and to correct them. This is done
in many ways, all of them involving some form of coding. The
simplest form of error detection is a single added parity
bit or a cyclic redundancy check. Multiple parity bits can
not only detect that an error has occurred, but also which
bits have been inverted, and should therefore be re-inverted
to restore the original data. The more extra bits are added,
the greater the chance that multiple errors will be detectable
and correctable.
Several codes can perform Single Error Correction, Double
Error Detection (SECDEC). One of the most commonly used is
the Hamming code.
At the other technological extreme, cuniform texts from about
1500 B.C. which recorded the dates when Venus was visible,
were examined on the basis of contained redundancies (the
dates of appearance and disappearance were suplemented by the
length of time of visibility) and "the worst data set ever
seen" by [Huber, Zurich] was corrected.
RAM which includes EDAC circuits is known as error
correcting memory (ECM).
[Wakerly, "Error Detecting Codes", North Holland 1978].
[Hamming, "Coding and Information Theory", 2nd Ed, Prentice
Hall 1986].
(1995-03-14)
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Nearby terms:
error « error-based testing « error correcting memory « error detection and correction » es » ES-1 » ESA
This article was derived from the Free Online Dictionary of Computers and is available under ther terms of the GNU Free Documentation License.
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